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| author | Vladimir Azarov <avm@intermediate-node.net> | 2024-10-01 15:47:05 +0200 |
|---|---|---|
| committer | Vladimir Azarov <avm@intermediate-node.net> | 2024-10-01 15:47:05 +0200 |
| commit | 4abab5ad6c8465a7528ccdd5f49367da05f78bbd (patch) | |
| tree | ebf009bf1376a5a223a915bc27cbbd791a1316bc /src/string/arm/__aeabi_memset.s | |
Initial version
Diffstat (limited to 'src/string/arm/__aeabi_memset.s')
| -rw-r--r-- | src/string/arm/__aeabi_memset.s | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/src/string/arm/__aeabi_memset.s b/src/string/arm/__aeabi_memset.s new file mode 100644 index 0000000..f9f6058 --- /dev/null +++ b/src/string/arm/__aeabi_memset.s @@ -0,0 +1,31 @@ +.syntax unified + +.global __aeabi_memclr8 +.global __aeabi_memclr4 +.global __aeabi_memclr +.global __aeabi_memset8 +.global __aeabi_memset4 +.global __aeabi_memset + +.type __aeabi_memclr8,%function +.type __aeabi_memclr4,%function +.type __aeabi_memclr,%function +.type __aeabi_memset8,%function +.type __aeabi_memset4,%function +.type __aeabi_memset,%function + +__aeabi_memclr8: +__aeabi_memclr4: +__aeabi_memclr: + movs r2, #0 +__aeabi_memset8: +__aeabi_memset4: +__aeabi_memset: + cmp r1, #0 + beq 2f + adds r1, r0, r1 +1: strb r2, [r0] + adds r0, r0, #1 + cmp r1, r0 + bne 1b +2: bx lr |