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| author | Vladimir Azarov <avm@intermediate-node.net> | 2024-10-01 15:47:05 +0200 |
|---|---|---|
| committer | Vladimir Azarov <avm@intermediate-node.net> | 2024-10-01 15:47:05 +0200 |
| commit | 4abab5ad6c8465a7528ccdd5f49367da05f78bbd (patch) | |
| tree | ebf009bf1376a5a223a915bc27cbbd791a1316bc /arch/riscv32/bits/fenv.h | |
Initial version
Diffstat (limited to 'arch/riscv32/bits/fenv.h')
| -rw-r--r-- | arch/riscv32/bits/fenv.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/riscv32/bits/fenv.h b/arch/riscv32/bits/fenv.h new file mode 100644 index 0000000..806ec40 --- /dev/null +++ b/arch/riscv32/bits/fenv.h @@ -0,0 +1,17 @@ +#define FE_INVALID 16 +#define FE_DIVBYZERO 8 +#define FE_OVERFLOW 4 +#define FE_UNDERFLOW 2 +#define FE_INEXACT 1 + +#define FE_ALL_EXCEPT 31 + +#define FE_TONEAREST 0 +#define FE_DOWNWARD 2 +#define FE_UPWARD 3 +#define FE_TOWARDZERO 1 + +typedef unsigned int fexcept_t; +typedef unsigned int fenv_t; + +#define FE_DFL_ENV ((const fenv_t *) -1) |