diff options
author | Vladimir Azarov <avm@intermediate-node.net> | 2024-10-01 15:47:05 +0200 |
---|---|---|
committer | Vladimir Azarov <avm@intermediate-node.net> | 2024-10-01 15:47:05 +0200 |
commit | 4abab5ad6c8465a7528ccdd5f49367da05f78bbd (patch) | |
tree | ebf009bf1376a5a223a915bc27cbbd791a1316bc /arch/powerpc/atomic_arch.h |
Initial version
Diffstat (limited to 'arch/powerpc/atomic_arch.h')
-rw-r--r-- | arch/powerpc/atomic_arch.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/powerpc/atomic_arch.h b/arch/powerpc/atomic_arch.h new file mode 100644 index 0000000..c267391 --- /dev/null +++ b/arch/powerpc/atomic_arch.h @@ -0,0 +1,38 @@ +#define a_ll a_ll +static inline int a_ll(volatile int *p) +{ + int v; + __asm__ __volatile__ ("lwarx %0, 0, %2" : "=r"(v) : "m"(*p), "r"(p)); + return v; +} + +#define a_sc a_sc +static inline int a_sc(volatile int *p, int v) +{ + int r; + __asm__ __volatile__ ( + "stwcx. %2, 0, %3 ; mfcr %0" + : "=r"(r), "=m"(*p) : "r"(v), "r"(p) : "memory", "cc"); + return r & 0x20000000; /* "bit 2" of "cr0" (backwards bit order) */ +} + +#define a_barrier a_barrier +static inline void a_barrier() +{ + __asm__ __volatile__ ("sync" : : : "memory"); +} + +#define a_pre_llsc a_barrier + +#define a_post_llsc a_post_llsc +static inline void a_post_llsc() +{ + __asm__ __volatile__ ("isync" : : : "memory"); +} + +#define a_clz_32 a_clz_32 +static inline int a_clz_32(uint32_t x) +{ + __asm__ ("cntlzw %0, %1" : "=r"(x) : "r"(x)); + return x; +} |