Driver

1 files changed, 30 insertions, 12 deletions

diff --git a/emit.fun b/emit.fun
index 709aaa9..9bfdc81 100644
--- a/emit.fun
+++ b/emit.fun
@@ -44,7 +44,7 @@ functor Emit(I: IL) = struct
   val callerSavedRegs = 4
   val usedRegNum = 10
 
-  val usedOverallRegNum = 13
+  val usedOverallRegNum = 14
 
   fun reg2idx reg =
     case List.find (fn (r, _) => r = reg) regs of
@@ -338,8 +338,6 @@ functor Emit(I: IL) = struct
     | 1 => Rsi
     | 2 => Rdx
     | 3 => Rcx
-    | 5 => R8
-    | 6 => R9
     | _ => raise Unreachable
 
   fun getInsAff (SOME ins) =
@@ -873,7 +871,12 @@ functor Emit(I: IL) = struct
           val (_, vt) = Array.sub (rinfo, idx)
         in
           case vt of
-            VtReg reg => Array.update (regs, reg2idx reg, true)
+            VtReg reg =>
+            let
+              val () = Array.update (regs, reg2idx reg, true)
+            in
+              ()
+            end
           | _ => ();
           loop (idx + 1)
         end
@@ -1436,7 +1439,7 @@ functor Emit(I: IL) = struct
     | MVM (off1, v, off2) =>
         [movRV Rax v, movRM Rdx off2, opRR Rax Rdx, movMR off1 Rax]
 
-    | RR (r1, r2) => [opRR r1 r2]
+    | RR (r1, r2) => [shift3 r1 r1 r2]
     | RM (r1, off) => [movRM Rax off, shift3 r1 r1 Rax]
     | RV (r1, v) => [opRV r1 (t v)]
     | MR (off, r) => [movRM Rax off, opRR Rax r, movMR off Rax]
@@ -1466,7 +1469,12 @@ functor Emit(I: IL) = struct
     val { opRR, opRM, opRV, opMR, opMV } = getUtilOps is8 "sub"
   in
     case tmp of
-      RRR (r1, r2, r3) => [movRR r1 r2, opRR r1 r3]
+      RRR (r1, r2, r3) =>
+      if r1 = r3 then
+        [sprintf `"neg " A2 pr is8 r1 %,
+          sprintf `"add " A2 pr is8 r1 `", " A2 pr is8 r2 %]
+      else
+        [movRR r1 r2, opRR r1 r3]
     | RRM (r1, r2, off) => [movRR r1 r2, opRM r1 off]
     | RRV (r1, r2, c) =>
       if isZeroConst c then
@@ -1542,6 +1550,7 @@ functor Emit(I: IL) = struct
     case vr of
       VtReg r => Printf out A2 pr is8 r %
     | VtStack off => Printf out A2 pm is8 off %
+    | VtConst _ => (printfn `"prm const" %; raise Unreachable)
     | _ => raise Unreachable
 
   fun assertSize is81 is82 is83 =
@@ -1596,6 +1605,8 @@ functor Emit(I: IL) = struct
         VtReg r => r
       | _ => Rax
 
+    val dest = getReg t1
+
     fun op2 () =
     let
       val form =
@@ -1606,11 +1617,10 @@ functor Emit(I: IL) = struct
        else
          Normal (t2, t3)
 
-      val dest = getReg t1
       val main =
         case form of
           Reduced rs =>
-            [ sprintf `"imul " A2 pr is81 dest `", " A2 prm is81 rs % ]
+          [ sprintf `"imul " A2 pr is81 dest `", " A2 prm is81 rs % ]
         | Normal (rs1, rs2) => [
             mov is81 (VtReg dest) rs1,
             sprintf `"imul " A2 pr is81 dest `", " A2 prm is81 rs2 %
@@ -1622,8 +1632,6 @@ functor Emit(I: IL) = struct
     fun op3 rs1 c =
       if fitsInNsx 32 c then
         let
-          val dest = getReg t1
-
           val main =
             [sprintf `"imul " A2 pr is81 dest `", "
               A2 prm is81 rs1 `", " A2 pc is81 c %]
@@ -1631,7 +1639,15 @@ functor Emit(I: IL) = struct
           main @ moveBackIfNeeded is81 dest t1
         end
       else
-        op2 ()
+        let
+          val main = [
+            movRV is81 Rax c,
+            sprintf `"imul " A2 pr is81 Rax `", " A2 prm is81 rs1 %,
+            movRR is81 dest Rax
+          ]
+        in
+          main @ moveBackIfNeeded is81 dest t1
+        end
   in
     case (t2, t3) of
       (VtConst c, _) => op3 t3 c
@@ -1667,8 +1683,9 @@ functor Emit(I: IL) = struct
         | Rcx => "cl"
         | Rsi => "sil"
         | Rdi => "dil"
+        | Rbp => "bpl"
         | R8 | R9 | R10 | R11 | R12 | R13 | R14 | R15
-        | Rbp | Rsp | Rax | Rdx => raise Unreachable
+        | Rsp | Rax | Rdx => raise Unreachable
     end
   in
     case ac of
@@ -2167,6 +2184,7 @@ functor Emit(I: IL) = struct
     val () = handleLocalIniLayouts ()
 
     val () = List.app emitFunc funcInfos
+    val () = TextIO.closeOut (valOf $ !file)
   in
     ()
   end