From 4abab5ad6c8465a7528ccdd5f49367da05f78bbd Mon Sep 17 00:00:00 2001 From: Vladimir Azarov Date: Tue, 1 Oct 2024 15:47:05 +0200 Subject: Initial version --- arch/arm/pthread_arch.h | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 arch/arm/pthread_arch.h (limited to 'arch/arm/pthread_arch.h') diff --git a/arch/arm/pthread_arch.h b/arch/arm/pthread_arch.h new file mode 100644 index 0000000..157e2ea --- /dev/null +++ b/arch/arm/pthread_arch.h @@ -0,0 +1,32 @@ +#if ((__ARM_ARCH_6K__ || __ARM_ARCH_6KZ__ || __ARM_ARCH_6ZK__) && !__thumb__) \ + || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7 + +static inline uintptr_t __get_tp() +{ + uintptr_t tp; + __asm__ ( "mrc p15,0,%0,c13,c0,3" : "=r"(tp) ); + return tp; +} + +#else + +#if __ARM_ARCH_4__ || __ARM_ARCH_4T__ || __ARM_ARCH == 4 +#define BLX "mov lr,pc\n\tbx" +#else +#define BLX "blx" +#endif + +static inline uintptr_t __get_tp() +{ + extern hidden uintptr_t __a_gettp_ptr; + register uintptr_t tp __asm__("r0"); + __asm__ ( BLX " %1" : "=r"(tp) : "r"(__a_gettp_ptr) : "cc", "lr" ); + return tp; +} + +#endif + +#define TLS_ABOVE_TP +#define GAP_ABOVE_TP 8 + +#define MC_PC arm_pc -- cgit v1.2.3