From 512985277bf70e425ab6e96b3aea69ba91426afc Mon Sep 17 00:00:00 2001
From: Vladimir Azarov <avm@intermediate-node.net>
Date: Mon, 11 Aug 2025 01:58:25 +0200
Subject: Removal of register reassignment in allocator

---
 il.sig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'il.sig')

diff --git a/il.sig b/il.sig
index 4136222..4705c1b 100644
--- a/il.sig
+++ b/il.sig
@@ -92,5 +92,5 @@ signature IL = sig
     strlits: int list
   }
 
-  val createCtx: P.progInfo -> ctx
+  val createCtx: P.progInfo -> string option -> ctx
 end
-- 
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